/*---------------------------------------------------------------------------
 * Dateiname   : qsm.h
 * Version     : 0.5
 * Zweck       : Deklarationen für das Queued Serial Modul
 * Organiation : Fachhochschule Hamburg
 * Autor       : Clemens Drews
 * Datum       : 3.12.97
 *---------------------------------------------------------------------------
 */
#ifndef QSM_H
#define QSM_H 

#include "hwdefs.h"

/*  QMCR BITS */

#define	STOP	BIT15
#define	FRZ1	BIT14
#define	FRZ0	BIT13
#define	SUPV	BIT7

/* QTEST	BITS */

#define	TSBD	BIT3
#define	SYNC	BIT2
#define	TQSM	BIT1
#define	TMM	BIT0

/* SCCR1	BITS */

#define	LOOPS	BIT14
#define	WOMS	BIT13
#define	ILT	BIT12
#define	PT	BIT11
#define	PE	BIT10
#define	M	BIT9
#define	WAKE	BIT8
#define	TIE	BIT7
#define	TCIE	BIT6
#define	RIE	BIT5
#define	ILIE	BIT4
#define	TE	BIT3
#define	RE	BIT2
#define	RMU	BIT1
#define	SBK	BIT0

/* SCSR	BITS	*/

#define	TDRE	BIT8
#define	TC	BIT7
#define	RDRF	BIT6
#define	RAF	BIT5
#define	IDLE	BIT4
#define	OR	BIT3
#define	NF	BIT2
#define	FE	BIT1
#define	PF	BIT0

/* SCDR	BITS	*/

#define	R8	BIT8
#define	R7	BIT7
#define	R6	BIT6
#define	R5	BIT5
#define	R4	BIT4
#define	R3	BIT3
#define	R2	BIT2
#define	R1	BIT1
#define	R0	BIT0

/* QPDR	BITS	*/

#define	D7	BIT7
#define	D6	BIT6
#define	D5 	BIT5
#define	D4 	BIT4
#define	D3 	BIT3
#define	D2 	BIT2
#define	D1 	BIT1
#define	D0 	BIT0

/* QPAR	BITS	*/

#define	QPPCS3	BIT14
#define	QPPCS2	BIT13
#define	QPPCS1	BIT12
#define	QPPCS0	BIT11
#define	QPMOSI	BIT9
#define	QPMISO	BIT8
#define	TDX	BIT7
#define	QDPCS3	BIT6
#define	QDPCS2	BIT5
#define	QDPCS1	BIT4
#define	QDPCS0	BIT3
#define	SCK	BIT2
#define	QDMOSI	BIT1
#define	QDMISO	BIT0

/* SPCR0	BITS	*/

#define	MSTR	BIT15
#define	WOMQ	BIT14
#define	CPOL	BIT9
#define	CPHA	BIT8

/*	SPCR1	BITS	*/

#define	SPE	BIT15

/*	SPCR2	BITS	*/

#define	SPIFE	BIT15
#define	WREN	BIT14
#define	WRT0	BIT13


/* SPCR3	BITS	*/

#define	LOOPQ	BIT10
#define	HMIE	BIT9
#define	HALT	BIT8
#define	SPIF	BIT7
#define	MODF	BIT6
#define	HALTA	BIT5

/* COMMAND RAM BITS	*/

#define	CRCONT	BIT7
#define	CRBITSE	BIT6
#define	CRDT	BIT5
#define	CRDSCK 	BIT4
#define	CRPCS3 	BIT3
#define	CRPCS2 	BIT2
#define	CRPCS1 	BIT1
#define	CRPCS0 	BIT0	


typedef struct {
  UWORD		QMCR;      /* C00 */
  UWORD		QTEST;     /* C02 */
  UBYTE		QILR;      /* C04 */
  UBYTE		QIVR;      /* C05 */
  UWORD		RESERVED1; /* C06 */
  UWORD		SCCR0;     /* C08 */
  UWORD		SCCR1;     /* C0A */
  UWORD		SCSR;      /* C0C */
  UWORD		SCDR;      /* C0E */
  UWORD		RESERVED2; /* C10 */
  UWORD		RESERVED3; /* C12 */
  UWORD		QPDR;      /* C14 */
  UWORD		QPAR;      /* C16 */ 
  UWORD		SPCR0;     /* C18 */ 
  UWORD		SPCR1;     /* C1A */
  UWORD		SPCR2;     /* C1C */
  UWORD	        SPCR3;     /* C1E */
  UBYTE		RESERVED4[224];/* C20 - CFF*/
  UWORD		RECRAM[16];/* D00 */		
  UWORD		TRANSRAM[16];/* D20 */
  UBYTE		CMDRAM[16];/* D40 */
} qsmstruct ;


#endif /* QSM_H  */
