sccDriver.txt

This file is a description of the changes necessary for the SCC Serial devices com2,3 &4
for the standard MBX860 BSP. You should use the following files that are part of this enhancement
and will be installed in the BSP directory. The h files listed below are actually in the /config/h
directories, these files will supercede them. Eventually, they will be placed in the correct
directories, hopefully when the BSP is released from Wind River.

/target/config/mbx860/sysSerial.c  - 	SCC structures, registers etc...
/target/config/mbx860/ppc860Intr.h - 	changes required to original ppc860Intr.h
/target/config/mbx860/ppc860SioScc.c - 	New serial driver routines
/target/config/mbx860/ppc860Sio.h  - 	changes for SCC2,3 &4.
/target/config/mbx860/mbx800.h     - 	changes for N_SIO_CHANNELS
/target/config/mbx860/ppc860Intr.c - 	changes to support interrupt vec for SCC(s)
/target/config/mbx860/ppc860Cpm.h  -	constants for CPM
/target/config/mbx860/ppc860Siu.h  - 	constants for SCC etc.
/target/config/mbx860/target.txt   - 	new file with new buffer addresses for SCC ports 
				   	(see also the end of this file)
/target/config/mbx860/sccDriver.txt- 	your looking at it.


You will need to modify
configAll.h
Make the following changes to configAll.h:

********************************************************************

configAll.h
06v.29jan96,kla	 defined INCLUDE_SCC_SIO
#define INCLUDE_SCC_SIO		/* SCC channels for tyCo */


********************************************************************

This driver only supports asyncrounous communication for the SCC serial devices.
Rebuild your VxWorks kernal, check the shell as follows:

-> devs
drv name
  0 /null
  1 /tyCo/0
  1 /tyCo/1
  1 /tyCo/2
  1 /tyCo/3
  4 kurtis:
  5 /vio
value = 25 = 0x19
->



The only other worthwhile comment is that CTS and CD are are "low" (no effect)
perminately. If you need to use CTS and CD for framing, then checkout the 
structure in sysSerial.c. See example below:

 /**** This pin configuration will drive CTS and CD low! *****
   **** If CTS and CD are used for framing, they must be changed ****/

 /*   *MPC860_PCPAR(ppc860Chan3.regBase) &= ~((1<<(15-7))|(1<<(15-6))); */
    *MPC860_PCDIR(ppc860Chan3.regBase) |= ((1<<(15-7))|(1<<(15-6)));    
    *MPC860_PCDAT(ppc860Chan3.regBase) &= ~((1<<(15-7))|(1<<(15-6)));    
    *MPC860_PCSO(ppc860Chan3.regBase) |= ((1<<(15-7))|(1<<(15-6)));


Enjoy!

Regards,

Kurtis


***** NEW MEMORY MAP ******


           ----------------------------- DPRAM base (address = IMMR + 0x2000)
           | 0x200 (512) bytes         |
           | I2C/SCC1 conflict         |
           | microcode patch part 1    |
           |---------------------------| end microcode patch (0x2200)
           | 8 bytes per descriptor    | UART Tx Buffer Descriptor (0x2200)
           |---------------------------|
	   | 8 bytes per descriptor    | UART2 Tx Buffer Descriptor (0x2208)
	   |---------------------------|
           | 16 descriptors @          | UART Rx Buffer Descriptors (0x2210)
           | 8 bytes per descriptor    |
           |---------------------------| 
	   | 8 bytes per descriptor    | UART3 Tx Buffer Descriptor (0x2290)
	   |---------------------------|
	   | 8 bytes per descriptor    | UART4 Tx Buffer Descriptor (0x2298)
	   |---------------------------| 
           |                           |
           |---------------------------|
           | 80 hex bytes allowed      | UART Tx Buffer (0x2300)
           |---------------------------|
           | one receive char/buffer   | UART Rx Buffer (0x2380)
           |---------------------------|
           |                           |
           |---------------------------| PIP Tx BD Buffer (0x2400)
           | 5 bytes CSR,Len,Addr      |
           |---------------------------| end PIP Tx Buffer (0x2405)
           |                           |
           |---------------------------|
           | 16 bytes allowed          | I2C Buffer Descriptors (0x2500)
           |---------------------------|
           | 32 bytes allowed          | I2C Buffer (0x2510)
           |---------------------------| end I2C Buffer (0x2530)
           |                           |
           |---------------------------| SROM temp. buffer (0x2600)
           | 256 bytes allowed         |
           |---------------------------| SROM temp. system values (0x2700)
           | 64 bytes allowed          |
           |---------------------------| end SROM temp. area (0x2740)
           |===========================| 
           | 32 descriptors @          | Enet Tx Buffer Descriptors (0x2800)
           | 8 bytes per descriptor    |
           |---------------------------|
           | 32 descriptors @          | Enet Rx Buffer Descriptors (0x2900)
           | 8 bytes per descriptor    | 
           |===========================|
           | 16 descriptors @          | UART2 Rx Buffer Descriptors (0x2A40)
           | 8 bytes per descriptor    |
           |---------------------------| 
           | 16 descriptors @          | UART3 Rx Buffer Descriptors (0x2AC0)
           | 8 bytes per descriptor    |
           |---------------------------| 
           | 16 descriptors @          | UART4 Rx Buffer Descriptors (0x2B40)
           | 8 bytes per descriptor    |
           |---------------------------| 
           | 80 hex bytes allowed      | UART2 Tx Buffer (0x2BC0)
           |---------------------------|
           | one receive char/buffer   | UART2 Rx Buffer (0x2C40)
           |                           |
           |---------------------------| 
           | 80 hex bytes allowed      | UART3 Tx Buffer (0x2CC0)
           |---------------------------|
           | one receive char/buffer   | UART3 Rx Buffer (0x2D40)
           |                           |
           |---------------------------| 
           | 80 hex bytes allowed      | UART4 Tx Buffer (0x2DC0)
           |---------------------------|
           | one receive char/buffer   | UART4 Rx Buffer (0x2E40)
           |---------------------------| 
           |===========================| 
           | 32 bytes                  | romInit temp. stack frame (0x2EE0)
           |---------------------------| end romInit temp. stack (0x2F00)
           | 0x200 (512) bytes         | microcode patch (0x2F00)
           | I2C/SCC1 conflict         |
           | microcode patch part 2    |
           |===========================|
           |---------------------------|
           | A4 hex bytes of parameter | SCC1 Parameter Area (0x3c00) Enet
           | info including Rx and Tx  |
           | BD pointers, func codes   |
           | etc...                    |
           |---------------------------|
           |                           |
           |---------------------------|
           | 3A hex bytes of parameter | SMC1 Parameter Area (0x3e80) UART
           | info including Rx and Tx  |
           | BD pointers, func codes   |
           | etc...                    |
           |---------------------------|



